Research Interests:
My interests are in parallel and distributed computing, embedded systems, configurable architectures, and high performance computing with a special focus on using algorithmic optimizations and analysis to improve application performance. I am currently interested in parallel algorithms for multicore architectures, network processors, SoC, and FPGA based systems, performance optimization techniques, FPGAs for high speed networking and applications of semantic web technologies.
Biographical Information:
Ph.D. in Electrical Engineering, 1983, Penn State, State College, PA.
Viktor K. Prasanna (V. K. Prasanna Kumar) received his BS in Electronics Engineering from the Bangalore University, MS from the School of Automation, Indian Institute of Science and Ph.D. in Computer Science from the Pennsylvania State University. He is the Steering Committee Co-Chair of the IEEE/ACM International Parallel & Distributed Processing Symposium (IPDPS) [merged IEEE International Parallel Processing Symposium (IPPS) and Symposium on Parallel and Distributed Processing (SPDP)]. He is the Steering Committee Chair of the International Conference on High Performance Computing (HiPC). In the past, he has served on the editorial boards of the IEEE Transactions on VLSI, IEEE Transactions on Parallel Distributed Systems, Journal of Pervasive and Mobile Computing, and the Proceedings of the IEEE. During 2003-06, he was the Editor-in-Chief of the IEEE Transactions on Computers. He serves on the editorial boards of the Journal of Parallel and Distributed Computing, ACM Transactions on Reconfigurable Technolgy and Systems, and Springer Transactions on Computational Science. He was the founding chair of the IEEE Computer Society Technical Committee on Parallel Processing. He is a Fellow of the IEEE and the ACM. He is a recipient of the 2005 Okawa Foundation Grant.
Research Centers and Institutes:
