Catalog Data:

Text book:

1. Class Notes and Lab Manual (required): Please buy from the university (USC) bookstore.
2. Textbook (optional): "The 80x86 Family Design, Programming, and Interfacing" (Second Edition) By John Uffenbeck.

Reference books:

Course monitors:

Topics:

1. Review of basic TTL components and board-level design issues
2. SRAM, EPROM, building larger memories from smaller memory chips
3. Memory interfacing to 8-bit/16-bit/32-bit byte addressable processors, Exhaustive and partial address Decoding
4. 8088/8086 microprocessor, bus cycle, pin definitions, Memory Space, I/O Space, system bus signals, Demultiplexing of multiplexed address/data lines
5. Clock generator, Ready and Reset synchronization, Wait state generator
6. Buffering and bidirectional buffer for data lines
7. I/O PORTs, memory mapped vs. isolated I/O, unconditional and conditional I/O, status register, port construction examples, 8-bit I/O interfacing to 16-bit and 32-bit processors
8. Timing specs of a microprocessor and timing specs of a memory. Board-level timing design/check.
9. Programmable Parallel Interface, 8255A
10. Min and Max mode of 8088, 8288 bus controller
11. Burst bus cycles of 80486
12. Pipelined bus cycles of 80386
13. Synchronous SRAMs
14. Flash ROMs
15. Traditional DRAMs, /RAS, /CAS, FPM (Fast Page Mode), Refreshing
16. Synchronous DRAMs
17. Vectored interrupts, Interrupt Controller 8259A
18. Serial Interface, 8251A, Timer/Counter 8254A
19. DMA, Direct Memory Access controller 8237A
20. Byte swapping, 32/16/8-bit bus conversion
21. Multibus, 8289A Bus Arbiter
22. Microcontrollers (if time permits)

Course Objectives:

1. To provide students with a substantial understanding of the board-level design of a microprocessor-based system
2. To expose students to the professional methods employed in the processor-based system design, construction and debugging using both simulation tools as well as laboratory equipment (in-circuit emulator, inverse-assembling 132-channel logic analyzer, etc.). 

Course Outcomes:

1. interface standard components (8 and 16-bit processors, RAM, EPROM, and LSI I/O chips)
2. perform logic design of the interface including needed buffering
3. perform timing checks for the interface design
4. understand basic functionality of standard chips (parallel interface, serial interface, interrupt controller, DMA controller, etc.) and understand their application in a system design
5. design and simulate microprocessor-based systems using simulation CAD tools
6. design and build a microprocessor-based system and test and debug using industrial-grade test equipment

Laboratory Projects:

1. Introduction to Logic Analyzer and EPROM access time measurement
2. Introduction to the ESA86/88-3
3. Introduction to using Synopsys SmartModel library components (processor, memory, etc.) in board-level simulation in ePD
4. Wait-state generator
5. Design of a Memory/IO controller to interface slow SRAMs and slow I/O chips to Intel 80486
6. Conditional and Unconditional I/O
7. Flash Memory interface
8. Simulation exercise on 8255A (parallel interface)
9. Bursting and Address pipelining using Synchronous SRAMs
10. Simulation exercise on 8259A (interrupt controller)
11. Cascading of the Programmable Interrupt Controller - 8259A
12. Simulation exercise on 8251A (serial interface)
13. Serial Communication with 8251A using ESA 86/88
14. Bus Arbitration exercise