EE 101: Introduction to Digital Logic
This is supplemental course information, designed to give you a fuller picture of the course and an expanded look at the topics covered. This is an unofficial document. The USC Course Catalog is the binding description of all university courses. Information such as books, materials covered, and the order of topics is subject to change. Please consult instructor for this semseter to get more upto date course information.
2006-2007 Catalog:
Boolean algebra; number systems; Boolean function synthesis; binary arithmetic; codes; combinational logic devices; sequential circuits; state machine design and implementation.
Text book:
“Digital Design , Principles & Practices” , 3rd Edition by John F. Wakerly, Prentice Hall, 2000.
Course Coordinators:
Monte Ung, Ph.D., Adjunct Professor of Electrical Engineering
Gandhi Puvvada, Adjunct Associate Professor or Electrical Engineering.
Topics:
Number Systems & Codes
Binary, octal, hexadecimal & BCD numbers. Conversions between them.
Signed number representations. Two’s complement addition/subtraction.
ASCII & BCD codes.
Combinational Logic Principles
Gates. Postulates & theorems in Binary Algebra.
Boolean functions, truth tables, product terms/sum terms. SOP and POS.
Combinational logic analysis/synthesis (AND-OR, OR-AND, NAND-NAND,
NOR-NOR, etc…, AND-OR-INVERT & OR-AND-INVERT forms.
Combinational circuit minimization (Karnaugh maps, SOP & POS
simplifications). “Don’t care” input conditions.
Combinational Logic Design Practices
Gate symbols. Signal names (global/local) & Active levels.
Function Table . Bubble-to-bubble logic design.
Comparators. Adders/subtractors (in binary & BCD).
Encoders/decoders . Multiplexers/demultiplexers.
XOR circuits . ROM / using ROM for random logic.
Sequential Logic Design Principles
Definitions of memory elements, states, synchronous logic, . . .
S-R latch, D latch , D flip-flop, master/slave SR & JK flip-flops.
Simple synchronous devices (counters, registers, shift registers . . . )
Characteristic equations . State diagram . Simple clocked synchronous
state machine analysis & design . State minimization, state assignment
& synthesis using D-flip-flops.
Course Objectives:
To introduce students to Boolean algebra and simple digital components. Students are also taught about the analysis & design of simple systems
(less than a dozen flip-flops plus assorted gates). After completing EE 101, a student is ready to implement similar designs in their first laboratory encounter. This is done in the following semester, in EE 102L.
Course Outcomes:
The students will be able to:
1) Understand the operations of basic logic gates and flip-flops.
2) Understands some basic operations being done on their PC (adders/ general-purpose registers, how data is stored inside a ROM. . . . ).
3) Analyze & design a simple digital circuit.
4) Draw a timing diagram of a circuit based upon a clock rate.
5) Read a TTL manual and select needed components for a circuit.
Laboratory Projects:
There is none for this course.
Prepared by: Monte Ung on 02 April 2002.